Speaker 1: Welcome to the deep dive. Today. We're getting into something
Speaker 1: pretty intricate the world of radio frequency integrated circuit design,
Speaker 1: our FIC design.
Speaker 2: Yeah, this is the magic behind you know, your phone
Speaker 2: connecting to the network, your Wi Fi, Bluetooth, all that
Speaker 2: wireless stuff we take for granted.
Speaker 1: It really is hidden complexity, isn't it? So? Our mission today.
Speaker 1: We've got some textbook excerpts, core material on RFICs and
Speaker 1: we want to pull out the key insights. What are
Speaker 1: the big challenges, what's surprising, our counterintuitive about making these
Speaker 1: tiny radio chips work exactly?
Speaker 2: We'll hit the fundamentals, things like noise distortion, matching impedances,
Speaker 2: how components behave on silicon, and then look at how
Speaker 2: those fundamentals play out in the actual circuit blocks, you know, mixers, oscillators, amplifiers,
Speaker 2: the whole chain.
Speaker 1: Okay, let's lift the lid on the engineering that makes
Speaker 1: wireless communication possible. Where do we start? What are the
Speaker 1: fundamental headaches for an RFIC designer?
Speaker 2: Right? Well, when you're working at these frequencies gigaherds usually
Speaker 2: and on a tiny you're immediately juggling a whole set
Speaker 2: of constraints. Okay, Like what things like making sure your
Speaker 2: circuit works over the right frequency range, getting enough gain,
Speaker 2: making sure it's stable and doesn't oscillate when you don't
Speaker 2: want it to. Then there's noise distortion that's nonlinearity, getting
Speaker 2: impedance is matched upright, and just dealing with the heat,
Speaker 2: the power dissipation.
Speaker 1: And I guess these all interact. You tweak one thing
Speaker 1: and something else gets worse.
Speaker 2: Oh. Absolutely, it's a constant balancing act. Improve the gain,
Speaker 2: your stability might suffer, or maybe distortion goes up. That's
Speaker 2: why it's challenging. And maybe the most fundamental limit you
Speaker 2: hit is noise.
Speaker 1: Ah, noise, the ultimate party pooper for sensitive electronics. What's
Speaker 1: the source say about noise in rfices.
Speaker 2: Well, it starts with the basics, thermal noise, just the
Speaker 2: random jiggling of electrons and resistors. The noise power is
Speaker 2: related to temperature and resistance. You know the classic four
Speaker 2: KTR thing for noise voltage squared perhtz. It's white noise,
Speaker 2: pretty flat with frequency at least up to very high
Speaker 2: freequo standard stuff.
Speaker 1: But there was something interesting about the available noise power.
Speaker 2: Yes, this is really key. The absolute maximum of noise
Speaker 2: power you can theoretically, pull out of any resistor doesn't matter.
Speaker 2: What its value is is k time's t, where K
Speaker 2: is Boltzmann's constant and t is temperature in kelvin.
Speaker 1: Just kt regardless of resistance, And.
Speaker 2: If you consider the noise over a certain bandwidth B,
Speaker 2: then the total available noise power is KTB. That's like
Speaker 2: the fundamental floor set by physics, and crucially, an antenna
Speaker 2: picking up signals from the environment, its available noise power
Speaker 2: is also modeled as KTB.
Speaker 1: So that KTB is the absolute minimum noise level you're
Speaker 1: starting with just from the source itself, before your circuit
Speaker 1: even touches the signal exactly.
Speaker 2: But then your circuit does add its own noise.
Speaker 1: Right, and that's where the noise figure comes in Precisely.
Speaker 2: Noise figure or NF, measures how much worse the signal
Speaker 2: to noise ratio gets as the signal goes through your circuit.
Speaker 2: It's basically the ratio of the actual output noise to
Speaker 2: the noise you get if the circuit itself were perfectly noiseless.
Speaker 2: An ideal circuit has an NF of one.
Speaker 1: Or zero dB, and in a receiver chain with multiple
Speaker 1: amplifiers and mixers and stuff. How does that noise add up?
Speaker 2: That's critical for system design. The source explains how noise
Speaker 2: figures cascade. The noise from the first stage gets added directly,
Speaker 2: but the noise from the second stage it gets divided
Speaker 2: by the gain of the first stage before it adds
Speaker 2: to the total. Noise from the third stage gets divided
Speaker 2: by the gain of the first and second stages, and
Speaker 2: so on.
Speaker 1: Ah, So the first stage is hugely important.
Speaker 2: Domit really? That first block Usually a low noise amplifier
Speaker 2: or LNA pretty much sets the noise performance for the
Speaker 2: whole receiver. You need to have good gain and crucially
Speaker 2: a very low noise figure itself. If the LNA does
Speaker 2: its job well, the noise added by later stages like mixers,
Speaker 2: which can be noisier, has much less impact on the
Speaker 2: overall system at.
Speaker 1: Ff Okay, so noise limits how faint a signal you
Speaker 1: can hear? What about the other end, how strong a
Speaker 1: signal can you handle before things go haywire?
Speaker 2: That's distortion right, exactly linearity or the lack there of nonlinearity.
Speaker 2: Real circuits aren't perfectly linear. Double the input doesn't always
Speaker 2: exactly double the output, especially when signals get.
Speaker 1: Large how do designers model that predict the distortion?
Speaker 2: A standard way is using a mathematical trick, a power
Speaker 2: series expansion. You approximate the output as a sum of
Speaker 2: terms a constant dc offset A term proportional to the
Speaker 2: input that's your ideal linear game. K one a term
Speaker 2: proportional to the input squared at K two. You put cbe,
Speaker 2: K three and so on, and.
Speaker 1: The K two K three terms those are the troublemakers.
Speaker 2: They are the odd order terms like K three cause
Speaker 2: things like gain compression or symmetrical clipping. Even order terms
Speaker 2: like K two show up strongly in things like diodes
Speaker 2: or when there's asymmetry. But the real issue in RF
Speaker 2: is often what happens when you have multiple.
Speaker 1: Signals, like in a real wireless environment.
Speaker 2: Right put two different frequencies, say F one and F two,
Speaker 2: into a circuit with that K three term, you get
Speaker 2: outputs of frequencies like two F one F two and
Speaker 2: two F two F one. These are the infamous third
Speaker 2: order intermodulation products IM three.
Speaker 1: And why are they so bad?
Speaker 2: Because if F one and F two are relatively close together,
Speaker 2: those IM three products can land right inside your desired
Speaker 2: channel or spill over into the channel next door, and
Speaker 2: once they're generated, they're almost impossible to filter out if
Speaker 2: they're close to your signal. The source also mentions related
Speaker 2: effects like composite second order CSO and composite triple bt
Speaker 2: CDB when you have many many tones like in cable
Speaker 2: TV systems.
Speaker 1: Okay, so we need ways to quantify how linear or
Speaker 1: nonlinear a circuit is. What are the key metrics?
Speaker 2: One big one is the one dB compression point. Us
Speaker 2: are called P one dB. It's the input power level
Speaker 2: where the actual gain of the circuit has dropped by
Speaker 2: one decibel compared to its ideal small signal. Linear gain
Speaker 2: gives you a practical idea of the maximum signal power
Speaker 2: the circuit can handle before it starts significantly compressing or
Speaker 2: distorting the signal.
Speaker 1: Okay, that's about gain saturation. What about those IM three proders? Specifically?
Speaker 2: For that, we use the intercet point, most commonly the
Speaker 2: third or interset point or IP three. It can be
Speaker 2: specified at the input IP three or output OIP three.
Speaker 2: It's a theoretical point. You usually find it by plotting
Speaker 2: the power of the desired signal and the power of
Speaker 2: the I three products on a log log scale versus
Speaker 2: input power. The lines are straight, but with different slopes
Speaker 2: where they would intersect if the circuit didn't compress first.
Speaker 2: That's the IP three.
Speaker 1: So it's extrapolated, not a real operating point.
Speaker 2: Usually yes, but it's incredibly useful. A higher IP three
Speaker 2: value means the circuit is more linear, it can handle
Speaker 2: stronger signals before generating problematic levels of IM three distortion.
Speaker 2: There's also a similar metric for second order effects IP two.
Speaker 1: Okay, So noise sets the floor the minimum signal you
Speaker 1: can detect, and linearity characterized by P one, d B
Speaker 1: and I three sets a sort of ceiling on the
Speaker 1: maximum signal you can handle without too much distortion.
Speaker 2: Exactly, And the difference between that floor and that ceiling
Speaker 2: that's your dynamic range, is the range of signal powers
Speaker 2: the circuit can process effectively.
Speaker 1: Ye.
Speaker 2: You want a wide dynamic range obviously, so you can
Speaker 2: pick up weak signals, but also tolerates strong interfering signals
Speaker 2: without getting swamped by noise or distortion.
Speaker 1: And the source mentioned bandwidth affects this.
Speaker 2: Right, because the total noise power is KTB. A wider
Speaker 2: bandwidth larger B means a higher noise floor. So for
Speaker 2: the same circuit linearity, increasing the bandwidth directly reduces your
Speaker 2: dynamic range. It's a fundamental trade off.
Speaker 1: Makes sense. Noise and linearity huge challenges, but none of
Speaker 1: that matters if you can't efficiently move the signal between
Speaker 1: stages or connect to the antenna. Impedance matching crucial.
Speaker 2: Impedance matching in RF is mostly about maximizing power transfer.
Speaker 2: You get maximum power from a source to a load
Speaker 2: when the load impedance is the complex conjugate of the
Speaker 2: source impedance. It's also important for preventing reflections on transmission lines,
Speaker 2: which become a big deal at high frequencies. And sometimes
Speaker 2: you might match for optimal noise performance instead of maximum power.
Speaker 1: And that standard fifty er impedance we always hear about, Yeah.
Speaker 2: Fifty oms is a very common characteristic impedance for RF systems, cables,
Speaker 2: test equipment makes it easier to connect things together.
Speaker 1: The source brings up the Smith chart as the go
Speaker 1: to tool here. Why is it so powerful?
Speaker 2: The Smith chart is just ingenious. It's a graphical way
Speaker 2: to plot all possible impedances with a positive real part
Speaker 2: onto a single circular chart. It directly relates impedance to
Speaker 2: the reflection coefficient how much power gets reflected back from
Speaker 2: an impedance mismatch. The center of the chart is a
Speaker 2: perfect match zero reflection, and.
Speaker 1: You can see how adding components moves you around.
Speaker 2: The chart exactly. Adding a component in series move you
Speaker 2: along circles of constant resistance. Adding a component in parallel
Speaker 2: moves you along circles of constant conductance. You can literally
Speaker 2: trace out a path on the chart from your starting
Speaker 2: impedance to your target impedance usually fifty olms or the
Speaker 2: conjugate match by adding inductors and capacitors.
Speaker 1: And you prefer inductors and capacitors because they don't add noise.
Speaker 2: Ideally, yes, purely reactive components LS and cs just store
Speaker 2: and release energy. They don't dissipate power like resistors, so
Speaker 2: they don't add thermal noise. That's why matching networks are
Speaker 2: typically built using them. The source also mentions things like
Speaker 2: converting between series and parallel RC or RL networks, which
Speaker 2: involves the quality factor or a queue, and using tapped
Speaker 2: capacitors or transformers for matching too.
Speaker 1: Okay, so we need resistors, capacitors, inductors, but we need
Speaker 1: to build them on the silicon chip. That sounds like
Speaker 1: where things get really tricky.
Speaker 2: Well, it's arguably one of the biggest differentiators and challenges
Speaker 2: in rfiic design compared to say, board level RF design.
Speaker 2: The materials and the physical structures you have available in
Speaker 2: a standard silicon CMOS or bike MOS process, the thin
Speaker 2: metal layers, the insulating dielectrics, the silicon substrate itself, they
Speaker 2: aren't ideal for RF passive components.
Speaker 1: What kind of problems pop up?
Speaker 2: Well, for resistors you have sheet resistance limitations, but a
Speaker 2: bigger issue at RF is the skin effect. At high frequencies,
Speaker 2: the current crowds towards the surface of a conductor instead
Speaker 2: of flowing uniformly through it. This effectively reduces the cross
Speaker 2: sectional area the current uses, increasing the resistance. The source
Speaker 2: even has an example showing this effect can significantly increase
Speaker 2: the resistance of typical on chip metal lines at gigahertz frequencies.
Speaker 1: So more loss just from the wires themselves, and parasitics
Speaker 1: everywhere unavoidable.
Speaker 2: Every piece of metal has some parasitic capacitance to neighboring
Speaker 2: metal and to the silicon substrate below it, and every
Speaker 2: current loop which includes every signal path, and this return
Speaker 2: path has some parasitic inductance. At low frequencies, you might
Speaker 2: ignore these, but at RF they can totally dominate the
Speaker 2: intended behavior of your circuit.
Speaker 1: Inductors seem like a particular pain point on chip.
Speaker 2: They really are. You typically make them as spiral patterns
Speaker 2: using the top thickest metal layers, but they suffer from
Speaker 2: a couple of major problems. First, their quality factor Q
Speaker 2: is usually quite low.
Speaker 1: Reminds what Q means here.
Speaker 2: Q is basically the ratio of energy stored in the
Speaker 2: inductor to the energy dissipated per cycle. A low Q
Speaker 2: means the inductor is lossy. It acts like it has
Speaker 2: a significant series resistance. The source mentions typical on chip
Speaker 2: Q values around five or so two gigaherds. That's not
Speaker 2: great compared to off ship components.
Speaker 1: And why is low Q bad?
Speaker 2: It adds loss, which reduces gain in tune circuits, broadens
Speaker 2: filter responses, and adds noise. The other big issue is
Speaker 2: self resonance. Because of the parasitic capacitance between the windings
Speaker 2: of the spiral, the inductor only actually looks inductive up
Speaker 2: to a certain frequency. Above that frequency the capacitance dominates
Speaker 2: and the whole thing starts acting like a capacitor. The
Speaker 2: self resonant frequency SRF sets an upper limit on the
Speaker 2: inductor's useful operating range and limbs how large an inductance
Speaker 2: value you can practically achieve on chip.
Speaker 1: I saw a note about differential que being better.
Speaker 2: Yeah, if you build a symmetric inductor for a differential
Speaker 2: signal path, some of the loss mechanisms, particularly coupling to
Speaker 2: the substrate, can look like common mode effects and have
Speaker 2: less impact on the differential signal, so the que measured
Speaker 2: differentially can be higher than for a single ended inductor
Speaker 2: connected to ground. Designers also use tricks like patterned ground
Speaker 2: shields underneath the spiral to try and reduce substraate.
Speaker 1: Losses, and even the tiny wires connecting the chip to
Speaker 1: the outside world matter.
Speaker 2: The bond wires absolutely critical. This is a huge practical issue.
Speaker 2: A single millimeter of bond wire can easily have an
Speaker 2: inductance of around a nano henry at gigahertz frequencies. That's
Speaker 2: the significant impedance. The source highlights that you have to
Speaker 2: account for bondwire inductance and also the mutual inductance between
Speaker 2: adjacent bondwires. Designers might use multiple bond wires in parallel
Speaker 2: to reduce inductance, carefully place ground wires between signal wires,
Speaker 2: or use differential signaling, which helps cancel out some inductive effects.
Speaker 1: Wow, just getting a signal on and off the ship
Speaker 1: is an RF design problem in itself. What about the
Speaker 1: active devices, the transistors the work courses.
Speaker 2: Yeah, usually mosvats, nms and pmos and CMS processes or
Speaker 2: sometimes bipolar junction transistors pjts. For RF, you care about
Speaker 2: their small signal behavior, things like transconductance UK, which is
Speaker 2: how much uppercurrent change you get for an input volti
Speaker 2: to change and output resistance.
Speaker 1: ROAD and how fast they are right.
Speaker 2: The key figures of merit for speed are FT the
Speaker 2: unity current gain frequency, and fimax the maximum frequency of oscillation.
Speaker 2: These tell you roughly the maximum frequency at which the
Speaker 2: transistor can provide useful gain. They depend heavily on how
Speaker 2: you bias the transistor, and again on internal parasitic capacitances
Speaker 2: within the transistor structure. And of course, transistors add noise
Speaker 2: to mainly thermal noise in the channel. For mosfetz and
Speaker 2: shot noise associated with current flow and bgts.
Speaker 1: Okay, So we have these imperfect passive components noisy, fast
Speaker 1: but not infinitely fast transistors. How do they come together
Speaker 1: in the main RF circuit blocks. Let's start with mixers.
Speaker 2: Mixers are frequency translators. Their main job, usually in a receiver,
Speaker 2: is to shift the high frequency signal coming from the
Speaker 2: antenna of the RF signal down to a lower, more
Speaker 2: manageable frequency called the intermediate frequency or IF.
Speaker 1: And how do they do that?
Speaker 2: Shifting it relianes on nonlinearity. You feed the RS signal
Speaker 2: and another signal generated locally on the chip called a
Speaker 2: local oscillator or L signal into a nonlinear circuit element.
Speaker 2: The nonlinearity creates new frequencies, including the sum RF plus
Speaker 2: LO and the difference rfl O frequencies. You then filter
Speaker 2: the output to keep just the one you want, usually
Speaker 2: the difference frequency for down conversion. The source mentions the
Speaker 2: Gilbert cell, which is a very common and clever mixer
Speaker 2: circuit topology used in ICs.
Speaker 1: What's a major headache for mixer design?
Speaker 2: One of the biggest is the image frequency. See for
Speaker 2: a given low frequency and a desired IF frequency is
Speaker 2: a IF R fl O. There's another RF frequency that
Speaker 2: will also mix down at the same if. That's the
Speaker 2: image frequency located at LO plus IF or loif if
Speaker 2: rfzl IF. If there's a signal at that image frequency,
Speaker 2: it will overlap with your desired signal at the mixer
Speaker 2: output and cause interference.
Speaker 1: Ah. So you need to get rid of the image
Speaker 1: signal before it hits the mixer.
Speaker 2: Ideally yes, with filtering yeah, or you can use specific
Speaker 2: mixer architectures called image reject mixers that inherently cancel out
Speaker 2: the image signal. Good image rejection IR is a really
Speaker 2: important spec for a receiver. Mixers also add noise, of course,
Speaker 2: both thermal noise and noise from the LO signal itself.
Speaker 2: Mixing down the source points out things like using a strong,
Speaker 2: sharp edged LLO signal can actually help improve both noise
Speaker 2: and linearity in some mixer types.
Speaker 1: Okay, moving on to that LO signal generator itself. The
Speaker 1: oscillator needs to be super stable and clean, right.
Speaker 2: Absolutely vital. An oscillator's job is to generate a precise,
Speaker 2: stable frequency reference. The basic principle is positive feedback. You
Speaker 2: take an amplifier loop its output back to its input
Speaker 2: through a frequency selective network like a resonant tank, and
Speaker 2: if at one specific frequency the gain around that loop
Speaker 2: is exactly one and the total phase shift is zero
Speaker 2: or three hundred and sixty degrees, the circuit will oscillate
Speaker 2: spontaneously at that frequency. That's the Barkhausen criterion and.
Speaker 1: This idea of negative resistance right.
Speaker 2: The frequency is usually set by a resonant tank circuit,
Speaker 2: typically an inductor and capacitor. But as we discussed on hip,
Speaker 2: tanks are lossy. They have resistance representing by a low queue.
Speaker 2: To sustain oscillation, the active part of the oscillator circuit
Speaker 2: needs to effectively cancel out that loss. It does this
Speaker 2: by providing what looks like a negative resistance, which injects
Speaker 2: energy into the tank to perfectly compensate for the energy
Speaker 2: being dissipated by the tank's positive resistance.
Speaker 1: So you need enough gain or negative resistance to get
Speaker 1: it started. What stops the oscillation amplitude running.
Speaker 2: Away nonlinearity again, but this time it's useful. As the
Speaker 2: oscillation starts and the signal amplitude builds up, the active
Speaker 2: devices in the oscillator naturally start to saturate or compress.
Speaker 2: This reduces the effective gain or the magnitude of the
Speaker 2: negative resistance. The amplitude stabilizes exactly at the point where
Speaker 2: the loop gain becomes equal to one. The source also
Speaker 2: mentions some subtle effects like bias point shifts during startup
Speaker 2: due to rectification of harmonics from this nonlinearity.
Speaker 1: Okay, stable frequency, stable amplitude. But the bane of oscillator
Speaker 1: designers is phase noise, isn't it? Oh?
Speaker 2: Absolutely? Phase noise is probably the most critical performance metric
Speaker 2: for many oscillators. It represents tiny, random fluctuations in the
Speaker 2: phase of the oscillator's signal over time, which is equivalent
Speaker 2: to fluctuations in its instantaneous frequency. It's noise, but it
Speaker 2: shows up as sidebands, sort of like a skirt of
Speaker 2: noise power around the perfect single tone you wanted.
Speaker 1: And why is phase noise so bad?
Speaker 2: In a receiver, the lo phase noise mixes with strong
Speaker 2: interfering signals and spreads their energy into your desired channel,
Speaker 2: potentially drowning out your weak signal. In a transmitter, it
Speaker 2: spreads your transmitted power into adjacent channels, causing interference to others.
Speaker 2: It fundamentally limits channel spacing and data rates In wireless systems.
Speaker 1: What determines how bad the phase noise is.
Speaker 2: Several things, often summarized by Lesen's model. A higher Q
Speaker 2: resonator tank is much better for phase noise. That's a
Speaker 2: big reason why off chip crystal oscillators are so much
Speaker 2: cleaner than on chip elc oscillators. More power in the
Speaker 2: oscillator generally helps up to a point, the noise figure
Speaker 2: of the active device matters, and crucially, low frequency noise
Speaker 2: sources like one half noise or flicker noise from the
Speaker 2: transistors or a noise on the control voltage used to
Speaker 2: tune the oscillator frequency for a character can get up
Speaker 2: converted by the oscillator's nonlinearity and significantly degrade the phase noise,
Speaker 2: especially close into the carrier frequency. The source had a
Speaker 2: good example highlighting the impact of noise on the tuning line.
Speaker 1: Any tricks to improve it, besides getting a higher que.
Speaker 2: Careful biasing and device sizing to minimize flicker noise helps.
Speaker 2: Some architectures are inherently better than others, and techniques like
Speaker 2: automatic amplitude control aec loops can help stabilize the operating
Speaker 2: point and make the phase noise more robust. To variations.
Speaker 1: All right, let's touch on filters and RFICs. What are
Speaker 1: their main jobs?
Speaker 2: Filters are the gatekeepers of frequency. They select the frequencies
Speaker 2: you want and reject the ones you don't, so defining
Speaker 2: the channel bandwidth, getting rid of strong out of van
Speaker 2: blockers or interferers, and as we mentioned, providing that critical
Speaker 2: image rejection before the mixer.
Speaker 1: And how are they built on chip? Often using those
Speaker 1: same LC resonators.
Speaker 2: Yeah, simple filters often use resonators. For example, using a
Speaker 2: parallel LC tank as load for an amplifier creates a
Speaker 2: band pass filter response around the resonant frequency. You can
Speaker 2: also use series or parallel resonators to create notches or
Speaker 2: band stop filters. The source showed a neat trick putting
Speaker 2: a series LC resonator in the emitter or source path
Speaker 2: of an LNA at its resonant frequency tuned to the
Speaker 2: image frequency. It presents very high impedance which kills the
Speaker 2: amplifier's gain, specifically at the image frequency, creating a notch
Speaker 2: filter right at the input.
Speaker 1: What are the challenges with on ship filters? Besides the
Speaker 1: low queue.
Speaker 2: Stability can be an issue, especially if you try to
Speaker 2: make active filters with game but maybe the biggest practical
Speaker 2: problem is sensitivity to process variations. Those on chip, inductor
Speaker 2: and capacitor values can vary quite a bit from chip
Speaker 2: to chip or krong a wafer. This means the center
Speaker 2: of frequency, bandwidth and rejection depth of your filter can
Speaker 2: also vary significantly, making it hard to meet tight specifications reliably.
Speaker 2: The source had an example showing how tolerance affects image
Speaker 2: rejection depth.
Speaker 1: Okay, last, big block power amplifiers PAS getting the signal
Speaker 1: boosted up to transmit.
Speaker 2: A PA's job is to take the relatively weak signal
Speaker 2: from the preceding stages and deliver a hefty amount of power,
Speaker 2: usually to the antenna, and ideally do it efficiently without
Speaker 2: wasting too much battery power as heat. They are often
Speaker 2: the most power hungry part of the whole RFIC.
Speaker 1: I've heard about different classes of PAS, like Class A,
Speaker 1: Cluss B, class F YES.
Speaker 2: The class describes how the output transistors are biased and operate.
Speaker 2: Class A is biased, so the transistor conducts current throughout
Speaker 2: the entire input signal cycle. It's the most linear, but
Speaker 2: also the least efficient theoretically maximum fifty percent. Class B
Speaker 2: uses two transistors each conducting for half the cycle, improving efficiency,
Speaker 2: but introducing crossover distortion. Class AB is a compromise bias
Speaker 2: slightly on to reduce that distortion. Class C conducts for
Speaker 2: less than half a cycle. Even more efficient but highly nonlinear.
Speaker 1: And the newer ones, like DEF.
Speaker 2: Those are switching classes. They try to operate the transistor
Speaker 2: more like an ideal switch, either fully on or fully off,
Speaker 2: which theoretically can be close to one hundred percent efficient.
Speaker 2: Class D often uses pulse width modulation Class E and
Speaker 2: f use clever resonant circuits on the output to shape
Speaker 2: the voltage and current waveforms at the transistor to minimize
Speaker 2: the time when both voltage and current are high simultaneously,
Speaker 2: thus reducing power loss. They need careful output filtering, though.
Speaker 1: Since PAS are often nonlinear, especially the efficient ones, do
Speaker 1: they still use that conjugate impedance match we talked.
Speaker 2: About ah good question. Generally no, not for maximum power output.
Speaker 2: Because the transistor's behavior is so nonlinear at high power levels,
Speaker 2: the standard small signal conjugate match matching to S twenty
Speaker 2: two doesn't give you the best performance. Instead, PA designers
Speaker 2: look for the optimum load impedance, often called googgle or ZOBT.
Speaker 2: This is the specific load impedance that allows the PA
Speaker 2: to deliver the required output power with the best possible
Speaker 2: efficiency given its nonlinear behavior. This optimum load is usually
Speaker 2: found experimentally or through simulation using techniques like load pull.
Speaker 1: What are the practical nightmares for PA designers on chip handling?
Speaker 2: The sheer amount of current is one pas can draw
Speaker 2: huge peak currents, requiring very large transistors often laid out
Speaker 2: with many parallel fingers to handle the current density. Heat
Speaker 2: is another massive issue. Bjt's especially can suffer from thermal runaway.
Speaker 2: As they get hotter, they conduct more current, which makes
Speaker 2: them hotter still, potentially leading to destruction. Designers use ballasting
Speaker 2: resistors in series with individual emitter fingers to help prevent
Speaker 2: this by introducing local negative feedback. Getting the heat off
Speaker 2: the chip through the package is also.
Speaker 1: Critical, and nonlinearity causes problems beyond just simple distortion right
Speaker 1: like spectral regrowth, Yes, exactly.
Speaker 2: If you put a signal through a nonlinear PA that
Speaker 2: has amplitude variations like most modern digital modulation schemes QPSKAOFDM, etc.
Speaker 2: The nonlinearity causes the signal spectrum to spread out into
Speaker 2: adjacent frequency channels. This is called spectral regrowth or adjacent
Speaker 2: channel power ratio ACPR. It's a major issue because it
Speaker 2: causes interference and is strictly regulated by wireless standards. It
Speaker 2: often limits how much power you can actually transmit.
Speaker 1: Can you fix that nonlinearity? Linearize the PA?
Speaker 2: People try. Techniques like feed forward exist, where you sample
Speaker 2: the distortion, amplify it, and subtract it from the output.
Speaker 2: It can work well, but as complex and power hungry itself.
Speaker 2: Feedback is conceptually simpler but very hard to implement at
Speaker 2: high RF frequencies because the delays around the loop make
Speaker 2: it difficult to ensure stability over the wide bandwidths needed.
Speaker 2: Sometimes predistortion is used on the input signal to trick
Speaker 2: and counteract the PA's nonlinearity.
Speaker 1: Wow. Okay, so designing these blocks is hard enough. Measuring
Speaker 1: them on the chip must also be specialized.
Speaker 2: Definitely. You can't just hook up probes like you would
Speaker 2: at low frequencies. We use s parameters scattering parameters to
Speaker 2: characterize how RF components and circuits reflect and transmit power waves.
Speaker 2: But when you measure on chip, your measurement probes in
Speaker 2: the bond pads themselves add their own parasitic inductance and capacitance,
Speaker 2: corrupting the measurement of your actual device.
Speaker 1: So how do you get an accurate measurement of just
Speaker 1: the device through de embedding?
Speaker 2: You design and measure special calibration structures on the same
Speaker 2: wafer right next to your device, typically a dummy open
Speaker 2: structure just the pads, and a dummy short structure the
Speaker 2: pads short it together with a low impedance line. By
Speaker 2: measuring these known structures, you can build a model of
Speaker 2: the parasitic effects of the pads and probes, and then
Speaker 2: mathematically subtract that model from your measurement of the actual device,
Speaker 2: effectively deembedding the device's true performance.
Speaker 1: It really sounds like RFIC design is just this constant
Speaker 1: struggle against the nasty side effects of physics. When you
Speaker 1: shrink things down and speed things up.
Speaker 2: That's a great way to put it. You're fighting the
Speaker 2: inherent resistance and loss in tiny wires, the unavoidable capacitances
Speaker 2: and inductances that pop up everywhere, the fundamental noise limits
Speaker 2: set by thermodynamics, the inherent nonlinearity of active devices, the
Speaker 2: difficulty of generating clean frequencies, the challenge of getting heat out.
Speaker 2: It's a battle on multiple fronts.
Speaker 1: So we've journeyed from the core challenges like noise and linearity,
Speaker 1: through impedance matching with the Smith chart, the surprising difficulty
Speaker 1: of making simple passives like inductors on chip, the behavior
Speaker 1: of transistors at RF, and then into the key blocks mixers, oscillators, filters,
Speaker 1: pas and even how you measure.
Speaker 2: Them, and hopefully you can see how understanding those fundamentals
Speaker 2: noise sources, distortion mechanisms, matching techniques, parasitic effects, the cube, resonators, phase,
Speaker 2: noise origins. It's just absolutely essential. It's all interconnected.
Speaker 1: It really gives you a totally new perspective on your
Speaker 1: wireless devices. Every time your phone grabs a signal, your
Speaker 1: Wi Fi connects, there's this incredibly intricate dance happening inside
Speaker 1: a tiny chip. Engineers having wrestled with all these competing
Speaker 1: demands performance, power, noise, linearity, cost size, just to make
Speaker 1: that invisible connection work reliably.
Speaker 2: It is pretty amazing engineering, and it makes you wonder.
Speaker 2: We've talked about the challenges known today that thing designers
Speaker 2: constantly fight against, but as we push to even higher frequencies,
Speaker 2: maybe terror hertz and demand even more complex communication. What's
Speaker 2: the next big fundamental roadblock going to be? What currently
Speaker 2: minor physical effect or constraint might suddenly become the dominant
Speaker 2: design challenge for the next generation of RFICs.