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<v Speaker 1>Welcome to the deep dive. Today. We're getting into something

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<v Speaker 1>pretty intricate the world of radio frequency integrated circuit design,

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<v Speaker 1>our FIC design.

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<v Speaker 2>Yeah, this is the magic behind you know, your phone

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<v Speaker 2>connecting to the network, your Wi Fi, Bluetooth, all that

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<v Speaker 2>wireless stuff we take for granted.

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<v Speaker 1>It really is hidden complexity, isn't it? So? Our mission today.

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<v Speaker 1>We've got some textbook excerpts, core material on RFICs and

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<v Speaker 1>we want to pull out the key insights. What are

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<v Speaker 1>the big challenges, what's surprising, our counterintuitive about making these

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<v Speaker 1>tiny radio chips work exactly?

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<v Speaker 2>We'll hit the fundamentals, things like noise distortion, matching impedances,

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<v Speaker 2>how components behave on silicon, and then look at how

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<v Speaker 2>those fundamentals play out in the actual circuit blocks, you know, mixers, oscillators, amplifiers,

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<v Speaker 2>the whole chain.

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<v Speaker 1>Okay, let's lift the lid on the engineering that makes

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<v Speaker 1>wireless communication possible. Where do we start? What are the

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<v Speaker 1>fundamental headaches for an RFIC designer?

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<v Speaker 2>Right? Well, when you're working at these frequencies gigaherds usually

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<v Speaker 2>and on a tiny you're immediately juggling a whole set

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<v Speaker 2>of constraints. Okay, Like what things like making sure your

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<v Speaker 2>circuit works over the right frequency range, getting enough gain,

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<v Speaker 2>making sure it's stable and doesn't oscillate when you don't

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<v Speaker 2>want it to. Then there's noise distortion that's nonlinearity, getting

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<v Speaker 2>impedance is matched upright, and just dealing with the heat,

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<v Speaker 2>the power dissipation.

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<v Speaker 1>And I guess these all interact. You tweak one thing

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<v Speaker 1>and something else gets worse.

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<v Speaker 2>Oh. Absolutely, it's a constant balancing act. Improve the gain,

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<v Speaker 2>your stability might suffer, or maybe distortion goes up. That's

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<v Speaker 2>why it's challenging. And maybe the most fundamental limit you

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<v Speaker 2>hit is noise.

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<v Speaker 1>Ah, noise, the ultimate party pooper for sensitive electronics. What's

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<v Speaker 1>the source say about noise in rfices.

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<v Speaker 2>Well, it starts with the basics, thermal noise, just the

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<v Speaker 2>random jiggling of electrons and resistors. The noise power is

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<v Speaker 2>related to temperature and resistance. You know the classic four

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<v Speaker 2>KTR thing for noise voltage squared perhtz. It's white noise,

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<v Speaker 2>pretty flat with frequency at least up to very high

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<v Speaker 2>freequo standard stuff.

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<v Speaker 1>But there was something interesting about the available noise power.

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<v Speaker 2>Yes, this is really key. The absolute maximum of noise

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<v Speaker 2>power you can theoretically, pull out of any resistor doesn't matter.

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<v Speaker 2>What its value is is k time's t, where K

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<v Speaker 2>is Boltzmann's constant and t is temperature in kelvin.

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<v Speaker 1>Just kt regardless of resistance, And.

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<v Speaker 2>If you consider the noise over a certain bandwidth B,

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<v Speaker 2>then the total available noise power is KTB. That's like

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<v Speaker 2>the fundamental floor set by physics, and crucially, an antenna

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<v Speaker 2>picking up signals from the environment, its available noise power

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<v Speaker 2>is also modeled as KTB.

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<v Speaker 1>So that KTB is the absolute minimum noise level you're

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<v Speaker 1>starting with just from the source itself, before your circuit

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<v Speaker 1>even touches the signal exactly.

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<v Speaker 2>But then your circuit does add its own noise.

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<v Speaker 1>Right, and that's where the noise figure comes in Precisely.

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<v Speaker 2>Noise figure or NF, measures how much worse the signal

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<v Speaker 2>to noise ratio gets as the signal goes through your circuit.

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<v Speaker 2>It's basically the ratio of the actual output noise to

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<v Speaker 2>the noise you get if the circuit itself were perfectly noiseless.

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<v Speaker 2>An ideal circuit has an NF of one.

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<v Speaker 1>Or zero dB, and in a receiver chain with multiple

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<v Speaker 1>amplifiers and mixers and stuff. How does that noise add up?

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<v Speaker 2>That's critical for system design. The source explains how noise

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<v Speaker 2>figures cascade. The noise from the first stage gets added directly,

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<v Speaker 2>but the noise from the second stage it gets divided

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<v Speaker 2>by the gain of the first stage before it adds

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<v Speaker 2>to the total. Noise from the third stage gets divided

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<v Speaker 2>by the gain of the first and second stages, and

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<v Speaker 2>so on.

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<v Speaker 1>Ah, So the first stage is hugely important.

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<v Speaker 2>Domit really? That first block Usually a low noise amplifier

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<v Speaker 2>or LNA pretty much sets the noise performance for the

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<v Speaker 2>whole receiver. You need to have good gain and crucially

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<v Speaker 2>a very low noise figure itself. If the LNA does

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<v Speaker 2>its job well, the noise added by later stages like mixers,

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<v Speaker 2>which can be noisier, has much less impact on the

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<v Speaker 2>overall system at.

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<v Speaker 1>Ff Okay, so noise limits how faint a signal you

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<v Speaker 1>can hear? What about the other end, how strong a

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<v Speaker 1>signal can you handle before things go haywire?

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<v Speaker 2>That's distortion right, exactly linearity or the lack there of nonlinearity.

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<v Speaker 2>Real circuits aren't perfectly linear. Double the input doesn't always

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<v Speaker 2>exactly double the output, especially when signals get.

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<v Speaker 1>Large how do designers model that predict the distortion?

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<v Speaker 2>A standard way is using a mathematical trick, a power

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<v Speaker 2>series expansion. You approximate the output as a sum of

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<v Speaker 2>terms a constant dc offset A term proportional to the

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<v Speaker 2>input that's your ideal linear game. K one a term

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<v Speaker 2>proportional to the input squared at K two. You put cbe,

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<v Speaker 2>K three and so on, and.

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<v Speaker 1>The K two K three terms those are the troublemakers.

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<v Speaker 2>They are the odd order terms like K three cause

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<v Speaker 2>things like gain compression or symmetrical clipping. Even order terms

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<v Speaker 2>like K two show up strongly in things like diodes

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<v Speaker 2>or when there's asymmetry. But the real issue in RF

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<v Speaker 2>is often what happens when you have multiple.

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<v Speaker 1>Signals, like in a real wireless environment.

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<v Speaker 2>Right put two different frequencies, say F one and F two,

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<v Speaker 2>into a circuit with that K three term, you get

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<v Speaker 2>outputs of frequencies like two F one F two and

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<v Speaker 2>two F two F one. These are the infamous third

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<v Speaker 2>order intermodulation products IM three.

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<v Speaker 1>And why are they so bad?

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<v Speaker 2>Because if F one and F two are relatively close together,

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<v Speaker 2>those IM three products can land right inside your desired

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<v Speaker 2>channel or spill over into the channel next door, and

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<v Speaker 2>once they're generated, they're almost impossible to filter out if

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<v Speaker 2>they're close to your signal. The source also mentions related

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<v Speaker 2>effects like composite second order CSO and composite triple bt

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<v Speaker 2>CDB when you have many many tones like in cable

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<v Speaker 2>TV systems.

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<v Speaker 1>Okay, so we need ways to quantify how linear or

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<v Speaker 1>nonlinear a circuit is. What are the key metrics?

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<v Speaker 2>One big one is the one dB compression point. Us

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<v Speaker 2>are called P one dB. It's the input power level

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<v Speaker 2>where the actual gain of the circuit has dropped by

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<v Speaker 2>one decibel compared to its ideal small signal. Linear gain

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<v Speaker 2>gives you a practical idea of the maximum signal power

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<v Speaker 2>the circuit can handle before it starts significantly compressing or

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<v Speaker 2>distorting the signal.

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<v Speaker 1>Okay, that's about gain saturation. What about those IM three proders? Specifically?

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<v Speaker 2>For that, we use the intercet point, most commonly the

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<v Speaker 2>third or interset point or IP three. It can be

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<v Speaker 2>specified at the input IP three or output OIP three.

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<v Speaker 2>It's a theoretical point. You usually find it by plotting

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<v Speaker 2>the power of the desired signal and the power of

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<v Speaker 2>the I three products on a log log scale versus

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<v Speaker 2>input power. The lines are straight, but with different slopes

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<v Speaker 2>where they would intersect if the circuit didn't compress first.

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<v Speaker 2>That's the IP three.

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<v Speaker 1>So it's extrapolated, not a real operating point.

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<v Speaker 2>Usually yes, but it's incredibly useful. A higher IP three

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<v Speaker 2>value means the circuit is more linear, it can handle

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<v Speaker 2>stronger signals before generating problematic levels of IM three distortion.

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<v Speaker 2>There's also a similar metric for second order effects IP two.

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<v Speaker 1>Okay, So noise sets the floor the minimum signal you

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<v Speaker 1>can detect, and linearity characterized by P one, d B

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<v Speaker 1>and I three sets a sort of ceiling on the

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<v Speaker 1>maximum signal you can handle without too much distortion.

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<v Speaker 2>Exactly, And the difference between that floor and that ceiling

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<v Speaker 2>that's your dynamic range, is the range of signal powers

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<v Speaker 2>the circuit can process effectively.

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<v Speaker 1>Ye.

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<v Speaker 2>You want a wide dynamic range obviously, so you can

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<v Speaker 2>pick up weak signals, but also tolerates strong interfering signals

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<v Speaker 2>without getting swamped by noise or distortion.

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<v Speaker 1>And the source mentioned bandwidth affects this.

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<v Speaker 2>Right, because the total noise power is KTB. A wider

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<v Speaker 2>bandwidth larger B means a higher noise floor. So for

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<v Speaker 2>the same circuit linearity, increasing the bandwidth directly reduces your

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<v Speaker 2>dynamic range. It's a fundamental trade off.

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<v Speaker 1>Makes sense. Noise and linearity huge challenges, but none of

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<v Speaker 1>that matters if you can't efficiently move the signal between

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<v Speaker 1>stages or connect to the antenna. Impedance matching crucial.

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<v Speaker 2>Impedance matching in RF is mostly about maximizing power transfer.

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<v Speaker 2>You get maximum power from a source to a load

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<v Speaker 2>when the load impedance is the complex conjugate of the

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<v Speaker 2>source impedance. It's also important for preventing reflections on transmission lines,

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<v Speaker 2>which become a big deal at high frequencies. And sometimes

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<v Speaker 2>you might match for optimal noise performance instead of maximum power.

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<v Speaker 1>And that standard fifty er impedance we always hear about, Yeah.

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<v Speaker 2>Fifty oms is a very common characteristic impedance for RF systems, cables,

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<v Speaker 2>test equipment makes it easier to connect things together.

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<v Speaker 1>The source brings up the Smith chart as the go

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<v Speaker 1>to tool here. Why is it so powerful?

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<v Speaker 2>The Smith chart is just ingenious. It's a graphical way

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<v Speaker 2>to plot all possible impedances with a positive real part

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<v Speaker 2>onto a single circular chart. It directly relates impedance to

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<v Speaker 2>the reflection coefficient how much power gets reflected back from

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<v Speaker 2>an impedance mismatch. The center of the chart is a

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<v Speaker 2>perfect match zero reflection, and.

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<v Speaker 1>You can see how adding components moves you around.

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<v Speaker 2>The chart exactly. Adding a component in series move you

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<v Speaker 2>along circles of constant resistance. Adding a component in parallel

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<v Speaker 2>moves you along circles of constant conductance. You can literally

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<v Speaker 2>trace out a path on the chart from your starting

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<v Speaker 2>impedance to your target impedance usually fifty olms or the

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<v Speaker 2>conjugate match by adding inductors and capacitors.

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<v Speaker 1>And you prefer inductors and capacitors because they don't add noise.

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<v Speaker 2>Ideally, yes, purely reactive components LS and cs just store

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<v Speaker 2>and release energy. They don't dissipate power like resistors, so

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<v Speaker 2>they don't add thermal noise. That's why matching networks are

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<v Speaker 2>typically built using them. The source also mentions things like

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<v Speaker 2>converting between series and parallel RC or RL networks, which

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<v Speaker 2>involves the quality factor or a queue, and using tapped

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<v Speaker 2>capacitors or transformers for matching too.

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<v Speaker 1>Okay, so we need resistors, capacitors, inductors, but we need

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<v Speaker 1>to build them on the silicon chip. That sounds like

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<v Speaker 1>where things get really tricky.

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<v Speaker 2>Well, it's arguably one of the biggest differentiators and challenges

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<v Speaker 2>in rfiic design compared to say, board level RF design.

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<v Speaker 2>The materials and the physical structures you have available in

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<v Speaker 2>a standard silicon CMOS or bike MOS process, the thin

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<v Speaker 2>metal layers, the insulating dielectrics, the silicon substrate itself, they

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<v Speaker 2>aren't ideal for RF passive components.

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<v Speaker 1>What kind of problems pop up?

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<v Speaker 2>Well, for resistors you have sheet resistance limitations, but a

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<v Speaker 2>bigger issue at RF is the skin effect. At high frequencies,

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<v Speaker 2>the current crowds towards the surface of a conductor instead

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<v Speaker 2>of flowing uniformly through it. This effectively reduces the cross

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<v Speaker 2>sectional area the current uses, increasing the resistance. The source

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<v Speaker 2>even has an example showing this effect can significantly increase

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<v Speaker 2>the resistance of typical on chip metal lines at gigahertz frequencies.

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<v Speaker 1>So more loss just from the wires themselves, and parasitics

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<v Speaker 1>everywhere unavoidable.

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<v Speaker 2>Every piece of metal has some parasitic capacitance to neighboring

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<v Speaker 2>metal and to the silicon substrate below it, and every

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<v Speaker 2>current loop which includes every signal path, and this return

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<v Speaker 2>path has some parasitic inductance. At low frequencies, you might

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<v Speaker 2>ignore these, but at RF they can totally dominate the

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<v Speaker 2>intended behavior of your circuit.

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<v Speaker 1>Inductors seem like a particular pain point on chip.

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<v Speaker 2>They really are. You typically make them as spiral patterns

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<v Speaker 2>using the top thickest metal layers, but they suffer from

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<v Speaker 2>a couple of major problems. First, their quality factor Q

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<v Speaker 2>is usually quite low.

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<v Speaker 1>Reminds what Q means here.

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<v Speaker 2>Q is basically the ratio of energy stored in the

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<v Speaker 2>inductor to the energy dissipated per cycle. A low Q

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<v Speaker 2>means the inductor is lossy. It acts like it has

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<v Speaker 2>a significant series resistance. The source mentions typical on chip

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<v Speaker 2>Q values around five or so two gigaherds. That's not

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<v Speaker 2>great compared to off ship components.

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<v Speaker 1>And why is low Q bad?

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<v Speaker 2>It adds loss, which reduces gain in tune circuits, broadens

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<v Speaker 2>filter responses, and adds noise. The other big issue is

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<v Speaker 2>self resonance. Because of the parasitic capacitance between the windings

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<v Speaker 2>of the spiral, the inductor only actually looks inductive up

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<v Speaker 2>to a certain frequency. Above that frequency the capacitance dominates

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<v Speaker 2>and the whole thing starts acting like a capacitor. The

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<v Speaker 2>self resonant frequency SRF sets an upper limit on the

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<v Speaker 2>inductor's useful operating range and limbs how large an inductance

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<v Speaker 2>value you can practically achieve on chip.

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<v Speaker 1>I saw a note about differential que being better.

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<v Speaker 2>Yeah, if you build a symmetric inductor for a differential

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<v Speaker 2>signal path, some of the loss mechanisms, particularly coupling to

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<v Speaker 2>the substrate, can look like common mode effects and have

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<v Speaker 2>less impact on the differential signal, so the que measured

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<v Speaker 2>differentially can be higher than for a single ended inductor

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<v Speaker 2>connected to ground. Designers also use tricks like patterned ground

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<v Speaker 2>shields underneath the spiral to try and reduce substraate.

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<v Speaker 1>Losses, and even the tiny wires connecting the chip to

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<v Speaker 1>the outside world matter.

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<v Speaker 2>The bond wires absolutely critical. This is a huge practical issue.

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<v Speaker 2>A single millimeter of bond wire can easily have an

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<v Speaker 2>inductance of around a nano henry at gigahertz frequencies. That's

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<v Speaker 2>the significant impedance. The source highlights that you have to

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<v Speaker 2>account for bondwire inductance and also the mutual inductance between

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<v Speaker 2>adjacent bondwires. Designers might use multiple bond wires in parallel

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<v Speaker 2>to reduce inductance, carefully place ground wires between signal wires,

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<v Speaker 2>or use differential signaling, which helps cancel out some inductive effects.

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<v Speaker 1>Wow, just getting a signal on and off the ship

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<v Speaker 1>is an RF design problem in itself. What about the

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<v Speaker 1>active devices, the transistors the work courses.

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<v Speaker 2>Yeah, usually mosvats, nms and pmos and CMS processes or

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<v Speaker 2>sometimes bipolar junction transistors pjts. For RF, you care about

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<v Speaker 2>their small signal behavior, things like transconductance UK, which is

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<v Speaker 2>how much uppercurrent change you get for an input volti

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<v Speaker 2>to change and output resistance.

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<v Speaker 1>ROAD and how fast they are right.

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<v Speaker 2>The key figures of merit for speed are FT the

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<v Speaker 2>unity current gain frequency, and fimax the maximum frequency of oscillation.

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<v Speaker 2>These tell you roughly the maximum frequency at which the

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<v Speaker 2>transistor can provide useful gain. They depend heavily on how

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<v Speaker 2>you bias the transistor, and again on internal parasitic capacitances

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<v Speaker 2>within the transistor structure. And of course, transistors add noise

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<v Speaker 2>to mainly thermal noise in the channel. For mosfetz and

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<v Speaker 2>shot noise associated with current flow and bgts.

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<v Speaker 1>Okay, So we have these imperfect passive components noisy, fast

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<v Speaker 1>but not infinitely fast transistors. How do they come together

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<v Speaker 1>in the main RF circuit blocks. Let's start with mixers.

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<v Speaker 2>Mixers are frequency translators. Their main job, usually in a receiver,

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<v Speaker 2>is to shift the high frequency signal coming from the

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<v Speaker 2>antenna of the RF signal down to a lower, more

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<v Speaker 2>manageable frequency called the intermediate frequency or IF.

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<v Speaker 1>And how do they do that?

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<v Speaker 2>Shifting it relianes on nonlinearity. You feed the RS signal

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<v Speaker 2>and another signal generated locally on the chip called a

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<v Speaker 2>local oscillator or L signal into a nonlinear circuit element.

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<v Speaker 2>The nonlinearity creates new frequencies, including the sum RF plus

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<v Speaker 2>LO and the difference rfl O frequencies. You then filter

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<v Speaker 2>the output to keep just the one you want, usually

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<v Speaker 2>the difference frequency for down conversion. The source mentions the

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<v Speaker 2>Gilbert cell, which is a very common and clever mixer

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<v Speaker 2>circuit topology used in ICs.

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<v Speaker 1>What's a major headache for mixer design?

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<v Speaker 2>One of the biggest is the image frequency. See for

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<v Speaker 2>a given low frequency and a desired IF frequency is

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<v Speaker 2>a IF R fl O. There's another RF frequency that

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<v Speaker 2>will also mix down at the same if. That's the

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<v Speaker 2>image frequency located at LO plus IF or loif if

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<v Speaker 2>rfzl IF. If there's a signal at that image frequency,

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<v Speaker 2>it will overlap with your desired signal at the mixer

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<v Speaker 2>output and cause interference.

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<v Speaker 1>Ah. So you need to get rid of the image

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<v Speaker 1>signal before it hits the mixer.

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<v Speaker 2>Ideally yes, with filtering yeah, or you can use specific

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<v Speaker 2>mixer architectures called image reject mixers that inherently cancel out

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<v Speaker 2>the image signal. Good image rejection IR is a really

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<v Speaker 2>important spec for a receiver. Mixers also add noise, of course,

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<v Speaker 2>both thermal noise and noise from the LO signal itself.

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<v Speaker 2>Mixing down the source points out things like using a strong,

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<v Speaker 2>sharp edged LLO signal can actually help improve both noise

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<v Speaker 2>and linearity in some mixer types.

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<v Speaker 1>Okay, moving on to that LO signal generator itself. The

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<v Speaker 1>oscillator needs to be super stable and clean, right.

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<v Speaker 2>Absolutely vital. An oscillator's job is to generate a precise,

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<v Speaker 2>stable frequency reference. The basic principle is positive feedback. You

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<v Speaker 2>take an amplifier loop its output back to its input

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<v Speaker 2>through a frequency selective network like a resonant tank, and

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<v Speaker 2>if at one specific frequency the gain around that loop

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<v Speaker 2>is exactly one and the total phase shift is zero

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<v Speaker 2>or three hundred and sixty degrees, the circuit will oscillate

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<v Speaker 2>spontaneously at that frequency. That's the Barkhausen criterion and.

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<v Speaker 1>This idea of negative resistance right.

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<v Speaker 2>The frequency is usually set by a resonant tank circuit,

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<v Speaker 2>typically an inductor and capacitor. But as we discussed on hip,

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<v Speaker 2>tanks are lossy. They have resistance representing by a low queue.

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<v Speaker 2>To sustain oscillation, the active part of the oscillator circuit

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<v Speaker 2>needs to effectively cancel out that loss. It does this

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<v Speaker 2>by providing what looks like a negative resistance, which injects

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<v Speaker 2>energy into the tank to perfectly compensate for the energy

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<v Speaker 2>being dissipated by the tank's positive resistance.

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<v Speaker 1>So you need enough gain or negative resistance to get

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<v Speaker 1>it started. What stops the oscillation amplitude running.

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<v Speaker 2>Away nonlinearity again, but this time it's useful. As the

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<v Speaker 2>oscillation starts and the signal amplitude builds up, the active

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<v Speaker 2>devices in the oscillator naturally start to saturate or compress.

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<v Speaker 2>This reduces the effective gain or the magnitude of the

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<v Speaker 2>negative resistance. The amplitude stabilizes exactly at the point where

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<v Speaker 2>the loop gain becomes equal to one. The source also

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<v Speaker 2>mentions some subtle effects like bias point shifts during startup

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<v Speaker 2>due to rectification of harmonics from this nonlinearity.

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<v Speaker 1>Okay, stable frequency, stable amplitude. But the bane of oscillator

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<v Speaker 1>designers is phase noise, isn't it? Oh?

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<v Speaker 2>Absolutely? Phase noise is probably the most critical performance metric

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<v Speaker 2>for many oscillators. It represents tiny, random fluctuations in the

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<v Speaker 2>phase of the oscillator's signal over time, which is equivalent

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<v Speaker 2>to fluctuations in its instantaneous frequency. It's noise, but it

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<v Speaker 2>shows up as sidebands, sort of like a skirt of

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<v Speaker 2>noise power around the perfect single tone you wanted.

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<v Speaker 1>And why is phase noise so bad?

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<v Speaker 2>In a receiver, the lo phase noise mixes with strong

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<v Speaker 2>interfering signals and spreads their energy into your desired channel,

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<v Speaker 2>potentially drowning out your weak signal. In a transmitter, it

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<v Speaker 2>spreads your transmitted power into adjacent channels, causing interference to others.

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<v Speaker 2>It fundamentally limits channel spacing and data rates In wireless systems.

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<v Speaker 1>What determines how bad the phase noise is.

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<v Speaker 2>Several things, often summarized by Lesen's model. A higher Q

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<v Speaker 2>resonator tank is much better for phase noise. That's a

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<v Speaker 2>big reason why off chip crystal oscillators are so much

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<v Speaker 2>cleaner than on chip elc oscillators. More power in the

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<v Speaker 2>oscillator generally helps up to a point, the noise figure

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<v Speaker 2>of the active device matters, and crucially, low frequency noise

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<v Speaker 2>sources like one half noise or flicker noise from the

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<v Speaker 2>transistors or a noise on the control voltage used to

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<v Speaker 2>tune the oscillator frequency for a character can get up

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<v Speaker 2>converted by the oscillator's nonlinearity and significantly degrade the phase noise,

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<v Speaker 2>especially close into the carrier frequency. The source had a

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<v Speaker 2>good example highlighting the impact of noise on the tuning line.

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<v Speaker 1>Any tricks to improve it, besides getting a higher que.

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<v Speaker 2>Careful biasing and device sizing to minimize flicker noise helps.

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<v Speaker 2>Some architectures are inherently better than others, and techniques like

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<v Speaker 2>automatic amplitude control aec loops can help stabilize the operating

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<v Speaker 2>point and make the phase noise more robust. To variations.

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<v Speaker 1>All right, let's touch on filters and RFICs. What are

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<v Speaker 1>their main jobs?

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<v Speaker 2>Filters are the gatekeepers of frequency. They select the frequencies

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<v Speaker 2>you want and reject the ones you don't, so defining

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<v Speaker 2>the channel bandwidth, getting rid of strong out of van

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<v Speaker 2>blockers or interferers, and as we mentioned, providing that critical

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<v Speaker 2>image rejection before the mixer.

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<v Speaker 1>And how are they built on chip? Often using those

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<v Speaker 1>same LC resonators.

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<v Speaker 2>Yeah, simple filters often use resonators. For example, using a

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<v Speaker 2>parallel LC tank as load for an amplifier creates a

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<v Speaker 2>band pass filter response around the resonant frequency. You can

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<v Speaker 2>also use series or parallel resonators to create notches or

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<v Speaker 2>band stop filters. The source showed a neat trick putting

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<v Speaker 2>a series LC resonator in the emitter or source path

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<v Speaker 2>of an LNA at its resonant frequency tuned to the

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<v Speaker 2>image frequency. It presents very high impedance which kills the

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00:19:29.480 --> 00:19:33.359
<v Speaker 2>amplifier's gain, specifically at the image frequency, creating a notch

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<v Speaker 2>filter right at the input.

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<v Speaker 1>What are the challenges with on ship filters? Besides the

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<v Speaker 1>low queue.

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<v Speaker 2>Stability can be an issue, especially if you try to

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<v Speaker 2>make active filters with game but maybe the biggest practical

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<v Speaker 2>problem is sensitivity to process variations. Those on chip, inductor

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<v Speaker 2>and capacitor values can vary quite a bit from chip

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<v Speaker 2>to chip or krong a wafer. This means the center

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<v Speaker 2>of frequency, bandwidth and rejection depth of your filter can

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<v Speaker 2>also vary significantly, making it hard to meet tight specifications reliably.

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<v Speaker 2>The source had an example showing how tolerance affects image

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<v Speaker 2>rejection depth.

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<v Speaker 1>Okay, last, big block power amplifiers PAS getting the signal

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<v Speaker 1>boosted up to transmit.

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<v Speaker 2>A PA's job is to take the relatively weak signal

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<v Speaker 2>from the preceding stages and deliver a hefty amount of power,

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00:20:17.839 --> 00:20:20.799
<v Speaker 2>usually to the antenna, and ideally do it efficiently without

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00:20:20.799 --> 00:20:23.720
<v Speaker 2>wasting too much battery power as heat. They are often

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00:20:23.759 --> 00:20:25.920
<v Speaker 2>the most power hungry part of the whole RFIC.

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00:20:26.319 --> 00:20:28.599
<v Speaker 1>I've heard about different classes of PAS, like Class A,

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<v Speaker 1>Cluss B, class F YES.

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00:20:30.640 --> 00:20:34.200
<v Speaker 2>The class describes how the output transistors are biased and operate.

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00:20:34.720 --> 00:20:37.720
<v Speaker 2>Class A is biased, so the transistor conducts current throughout

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<v Speaker 2>the entire input signal cycle. It's the most linear, but

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00:20:41.039 --> 00:20:45.240
<v Speaker 2>also the least efficient theoretically maximum fifty percent. Class B

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00:20:45.440 --> 00:20:49.599
<v Speaker 2>uses two transistors each conducting for half the cycle, improving efficiency,

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00:20:49.640 --> 00:20:53.960
<v Speaker 2>but introducing crossover distortion. Class AB is a compromise bias

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00:20:54.000 --> 00:20:57.480
<v Speaker 2>slightly on to reduce that distortion. Class C conducts for

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00:20:57.559 --> 00:21:01.759
<v Speaker 2>less than half a cycle. Even more efficient but highly nonlinear.

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<v Speaker 1>And the newer ones, like DEF.

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00:21:04.200 --> 00:21:07.200
<v Speaker 2>Those are switching classes. They try to operate the transistor

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00:21:07.240 --> 00:21:09.960
<v Speaker 2>more like an ideal switch, either fully on or fully off,

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00:21:09.960 --> 00:21:12.319
<v Speaker 2>which theoretically can be close to one hundred percent efficient.

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00:21:12.839 --> 00:21:16.400
<v Speaker 2>Class D often uses pulse width modulation Class E and

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<v Speaker 2>f use clever resonant circuits on the output to shape

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00:21:18.960 --> 00:21:21.799
<v Speaker 2>the voltage and current waveforms at the transistor to minimize

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00:21:21.799 --> 00:21:24.720
<v Speaker 2>the time when both voltage and current are high simultaneously,

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00:21:25.039 --> 00:21:29.079
<v Speaker 2>thus reducing power loss. They need careful output filtering, though.

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<v Speaker 1>Since PAS are often nonlinear, especially the efficient ones, do

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<v Speaker 1>they still use that conjugate impedance match we talked.

425
00:21:35.000 --> 00:21:39.240
<v Speaker 2>About ah good question. Generally no, not for maximum power output.

426
00:21:39.759 --> 00:21:43.759
<v Speaker 2>Because the transistor's behavior is so nonlinear at high power levels,

427
00:21:44.039 --> 00:21:47.519
<v Speaker 2>the standard small signal conjugate match matching to S twenty

428
00:21:47.519 --> 00:21:51.559
<v Speaker 2>two doesn't give you the best performance. Instead, PA designers

429
00:21:51.559 --> 00:21:55.279
<v Speaker 2>look for the optimum load impedance, often called googgle or ZOBT.

430
00:21:56.079 --> 00:21:58.519
<v Speaker 2>This is the specific load impedance that allows the PA

431
00:21:58.599 --> 00:22:01.680
<v Speaker 2>to deliver the required output power with the best possible

432
00:22:01.680 --> 00:22:05.720
<v Speaker 2>efficiency given its nonlinear behavior. This optimum load is usually

433
00:22:05.759 --> 00:22:10.119
<v Speaker 2>found experimentally or through simulation using techniques like load pull.

434
00:22:10.200 --> 00:22:13.480
<v Speaker 1>What are the practical nightmares for PA designers on chip handling?

435
00:22:13.519 --> 00:22:16.079
<v Speaker 2>The sheer amount of current is one pas can draw

436
00:22:16.200 --> 00:22:19.680
<v Speaker 2>huge peak currents, requiring very large transistors often laid out

437
00:22:19.680 --> 00:22:22.960
<v Speaker 2>with many parallel fingers to handle the current density. Heat

438
00:22:23.079 --> 00:22:26.960
<v Speaker 2>is another massive issue. Bjt's especially can suffer from thermal runaway.

439
00:22:27.000 --> 00:22:29.319
<v Speaker 2>As they get hotter, they conduct more current, which makes

440
00:22:29.319 --> 00:22:33.240
<v Speaker 2>them hotter still, potentially leading to destruction. Designers use ballasting

441
00:22:33.319 --> 00:22:36.279
<v Speaker 2>resistors in series with individual emitter fingers to help prevent

442
00:22:36.319 --> 00:22:39.920
<v Speaker 2>this by introducing local negative feedback. Getting the heat off

443
00:22:39.920 --> 00:22:41.680
<v Speaker 2>the chip through the package is also.

444
00:22:41.440 --> 00:22:46.319
<v Speaker 1>Critical, and nonlinearity causes problems beyond just simple distortion right

445
00:22:46.400 --> 00:22:48.640
<v Speaker 1>like spectral regrowth, Yes, exactly.

446
00:22:48.720 --> 00:22:50.880
<v Speaker 2>If you put a signal through a nonlinear PA that

447
00:22:50.920 --> 00:22:55.960
<v Speaker 2>has amplitude variations like most modern digital modulation schemes QPSKAOFDM, etc.

448
00:22:56.680 --> 00:22:59.880
<v Speaker 2>The nonlinearity causes the signal spectrum to spread out into

449
00:22:59.880 --> 00:23:03.799
<v Speaker 2>adjacent frequency channels. This is called spectral regrowth or adjacent

450
00:23:03.880 --> 00:23:07.720
<v Speaker 2>channel power ratio ACPR. It's a major issue because it

451
00:23:07.759 --> 00:23:11.599
<v Speaker 2>causes interference and is strictly regulated by wireless standards. It

452
00:23:11.640 --> 00:23:13.880
<v Speaker 2>often limits how much power you can actually transmit.

453
00:23:14.079 --> 00:23:17.240
<v Speaker 1>Can you fix that nonlinearity? Linearize the PA?

454
00:23:17.279 --> 00:23:20.319
<v Speaker 2>People try. Techniques like feed forward exist, where you sample

455
00:23:20.319 --> 00:23:22.880
<v Speaker 2>the distortion, amplify it, and subtract it from the output.

456
00:23:23.240 --> 00:23:26.160
<v Speaker 2>It can work well, but as complex and power hungry itself.

457
00:23:26.759 --> 00:23:29.720
<v Speaker 2>Feedback is conceptually simpler but very hard to implement at

458
00:23:29.799 --> 00:23:33.000
<v Speaker 2>high RF frequencies because the delays around the loop make

459
00:23:33.039 --> 00:23:36.200
<v Speaker 2>it difficult to ensure stability over the wide bandwidths needed.

460
00:23:36.799 --> 00:23:39.720
<v Speaker 2>Sometimes predistortion is used on the input signal to trick

461
00:23:39.720 --> 00:23:41.880
<v Speaker 2>and counteract the PA's nonlinearity.

462
00:23:42.000 --> 00:23:45.440
<v Speaker 1>Wow. Okay, so designing these blocks is hard enough. Measuring

463
00:23:45.519 --> 00:23:47.720
<v Speaker 1>them on the chip must also be specialized.

464
00:23:48.039 --> 00:23:50.640
<v Speaker 2>Definitely. You can't just hook up probes like you would

465
00:23:50.640 --> 00:23:54.680
<v Speaker 2>at low frequencies. We use s parameters scattering parameters to

466
00:23:54.759 --> 00:23:59.400
<v Speaker 2>characterize how RF components and circuits reflect and transmit power waves.

467
00:24:00.000 --> 00:24:02.599
<v Speaker 2>But when you measure on chip, your measurement probes in

468
00:24:02.640 --> 00:24:06.759
<v Speaker 2>the bond pads themselves add their own parasitic inductance and capacitance,

469
00:24:07.279 --> 00:24:09.559
<v Speaker 2>corrupting the measurement of your actual device.

470
00:24:09.839 --> 00:24:12.440
<v Speaker 1>So how do you get an accurate measurement of just

471
00:24:12.759 --> 00:24:15.200
<v Speaker 1>the device through de embedding?

472
00:24:15.599 --> 00:24:18.519
<v Speaker 2>You design and measure special calibration structures on the same

473
00:24:18.559 --> 00:24:21.799
<v Speaker 2>wafer right next to your device, typically a dummy open

474
00:24:21.799 --> 00:24:24.680
<v Speaker 2>structure just the pads, and a dummy short structure the

475
00:24:24.680 --> 00:24:27.720
<v Speaker 2>pads short it together with a low impedance line. By

476
00:24:27.759 --> 00:24:30.119
<v Speaker 2>measuring these known structures, you can build a model of

477
00:24:30.160 --> 00:24:33.000
<v Speaker 2>the parasitic effects of the pads and probes, and then

478
00:24:33.039 --> 00:24:36.359
<v Speaker 2>mathematically subtract that model from your measurement of the actual device,

479
00:24:36.880 --> 00:24:39.480
<v Speaker 2>effectively deembedding the device's true performance.

480
00:24:39.559 --> 00:24:42.480
<v Speaker 1>It really sounds like RFIC design is just this constant

481
00:24:42.480 --> 00:24:45.119
<v Speaker 1>struggle against the nasty side effects of physics. When you

482
00:24:45.240 --> 00:24:46.880
<v Speaker 1>shrink things down and speed things up.

483
00:24:47.119 --> 00:24:49.119
<v Speaker 2>That's a great way to put it. You're fighting the

484
00:24:49.160 --> 00:24:53.759
<v Speaker 2>inherent resistance and loss in tiny wires, the unavoidable capacitances

485
00:24:53.799 --> 00:24:56.880
<v Speaker 2>and inductances that pop up everywhere, the fundamental noise limits

486
00:24:56.920 --> 00:25:01.039
<v Speaker 2>set by thermodynamics, the inherent nonlinearity of active devices, the

487
00:25:01.119 --> 00:25:04.480
<v Speaker 2>difficulty of generating clean frequencies, the challenge of getting heat out.

488
00:25:05.279 --> 00:25:07.000
<v Speaker 2>It's a battle on multiple fronts.

489
00:25:07.119 --> 00:25:11.039
<v Speaker 1>So we've journeyed from the core challenges like noise and linearity,

490
00:25:11.559 --> 00:25:14.720
<v Speaker 1>through impedance matching with the Smith chart, the surprising difficulty

491
00:25:14.759 --> 00:25:17.799
<v Speaker 1>of making simple passives like inductors on chip, the behavior

492
00:25:17.839 --> 00:25:23.200
<v Speaker 1>of transistors at RF, and then into the key blocks mixers, oscillators, filters,

493
00:25:23.240 --> 00:25:25.680
<v Speaker 1>pas and even how you measure.

494
00:25:25.400 --> 00:25:28.599
<v Speaker 2>Them, and hopefully you can see how understanding those fundamentals

495
00:25:29.079 --> 00:25:34.640
<v Speaker 2>noise sources, distortion mechanisms, matching techniques, parasitic effects, the cube, resonators, phase,

496
00:25:34.680 --> 00:25:37.319
<v Speaker 2>noise origins. It's just absolutely essential. It's all interconnected.

497
00:25:37.640 --> 00:25:40.359
<v Speaker 1>It really gives you a totally new perspective on your

498
00:25:40.400 --> 00:25:43.440
<v Speaker 1>wireless devices. Every time your phone grabs a signal, your

499
00:25:43.440 --> 00:25:47.440
<v Speaker 1>Wi Fi connects, there's this incredibly intricate dance happening inside

500
00:25:47.440 --> 00:25:50.960
<v Speaker 1>a tiny chip. Engineers having wrestled with all these competing

501
00:25:50.960 --> 00:25:55.920
<v Speaker 1>demands performance, power, noise, linearity, cost size, just to make

502
00:25:55.920 --> 00:25:57.839
<v Speaker 1>that invisible connection work reliably.

503
00:25:58.160 --> 00:26:01.000
<v Speaker 2>It is pretty amazing engineering, and it makes you wonder.

504
00:26:01.480 --> 00:26:03.960
<v Speaker 2>We've talked about the challenges known today that thing designers

505
00:26:03.960 --> 00:26:07.559
<v Speaker 2>constantly fight against, but as we push to even higher frequencies,

506
00:26:07.680 --> 00:26:12.240
<v Speaker 2>maybe terror hertz and demand even more complex communication. What's

507
00:26:12.279 --> 00:26:15.680
<v Speaker 2>the next big fundamental roadblock going to be? What currently

508
00:26:15.839 --> 00:26:19.240
<v Speaker 2>minor physical effect or constraint might suddenly become the dominant

509
00:26:19.240 --> 00:26:21.519
<v Speaker 2>design challenge for the next generation of RFICs.
